Traffic-and thermal-aware routing for throttled three-dimensional Network-on-Chip systems

Author

Lin, Shu-Yen ; Yin, Tzu-Chu ; Wang, Hao-Yu ; Wu, An-Yeu

Author_Institution

Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2011

fDate

25-28 April 2011

Firstpage

1

Lastpage

4

Abstract

Thermal issue is one of the major challenges in the research field of three-dimensional (3D) IC. Network-on-Chip (NoC) has been viewed as a practical communication infrastructure in 3D IC. In this paper, we proposed an adaptive routing algorithm, Traffic- and Throttling-Awareness Routing (TTAR), to address the traffic congestion due to throttling of transient-temperature control. TTAR can balance the network traffic and detour the throttled tiles. The experimental results show that TTAR does not influence the ability of heat dissipation seriously and can achieve 8% ~ 680% throughput improvements than the previous routing algorithms at 50-cycle average latency.

Keywords

network routing; network-on-chip; three-dimensional integrated circuits; 50-cycle average latency; adaptive routing; heat dissipation; network traffic; thermal-aware routing; three-dimensional integrated circuit; throttled three-dimensional network-on-chip; throttled tiles; traffic congestion; traffic-aware routing; transient-temperature control; Adaptation model; Routing; System-on-a-chip; Thermal management; Three dimensional displays; Throughput; Tiles;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test (VLSI-DAT), 2011 International Symposium on

Conference_Location

Hsinchu

ISSN

Pending

Print_ISBN

978-1-4244-8500-0

Type

conf

DOI

10.1109/VDAT.2011.5783639

Filename

5783639