DocumentCode :
3373347
Title :
The impact of test on reliability, maintainability, and producibility
Author :
Nurie, Ghulam M.
Author_Institution :
ExperTest, Mountain View, CA, USA
fYear :
1992
fDate :
1992
Firstpage :
97
Lastpage :
101
Abstract :
High quality ASIC test programs ensure higher reliability and reduced cost of manufacturing and maintenance for the ASICs and for the systems in which they are used. In real world situations of less-than-perfect process yields, test programs with very high fault coverage are necessary for producing defect-free products. Manual test pattern generation is not practical and most conventional automatic test pattern generation cools do not handle sequential circuits. Thus, the designer is forced to adopt design-for-test (DFT) techniques that turn the sequential circuit into a combinational one. However, these DFT techniques cannot be used in leading edge applications where the circuit performance and the logic density cannot be sacrificed. Fortunately, a solution exists that takes advantage of the hierarchical design methodology commonly employed in the design of complex ASICs. This solution automatically produces test patterns for sequential circuits without requiring use of DFT techniques. The Test Design Expert (TDX) from ExperTest, uses an expert-systems approach by utilizing the behavior description of the ASIC to generate the test vectors for faults modeled at the gate level. TDX generates high quality test patterns for sequential circuits, including asynchronous ones, by understanding the function of the circuit from the behavior description written in VHDL. The advantage of this methodology is that the designer does not have to change the design methodology and is not restricted by the constraints of a specific DFT technique. Test development proceeds along with the logic design and no special requirements are imposed on the manufacturing process
Keywords :
application specific integrated circuits; circuit analysis computing; circuit reliability; expert systems; integrated circuit testing; ASIC test programs; Test Design Expert; automatic test pattern generation; circuit performance; design methodology; design-for-test techniques; expert-systems approach; fault coverage; logic density; maintainability; manual test pattern generation; manufacturing process; producibility; reliability; Application specific integrated circuits; Circuit faults; Circuit testing; Design for testability; Design methodology; Maintenance; Sequential analysis; Sequential circuits; System testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability and Maintainability Computer-Aided Engineering in Concurrent Engineering, 1990 and 1991., Combined Proceedings of the 1990 and 1991 Leesburg Workshops on
Conference_Location :
Leesburg, VA ; Ellicott City, MD
Type :
conf
DOI :
10.1109/RMCAE.1992.245506
Filename :
245506
Link To Document :
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