Title :
InP HBT IC manufacturing
Author :
Nguyen, N.X. ; Fierro, J. ; Feng, K.T. ; Nguyen, C.
Author_Institution :
Global Commun. Semicond., Inc., Torrance, CA, USA
fDate :
31 May-4 June 2004
Abstract :
An InP HBT IC process technology has been developed to manufacture high performance electronics for commercial and military applications. Mainstream semiconductor production practices, statistical process control (SPC) and process failure mode effects and analysis (PFMEA) have been implemented to sustain run-to-run consistency and uniformity of the processed wafers. Process reliability qualification of fabricated devices has yielded a projected mean-time-to-failure (MTTF) of 5e6 hours at the operating condition of Tj=125 °C and Jc=100 kA/cm2. Comprehensive design kits consisting of VBIC device models, design layout rules, and standard library cells are provided to maximize first-pass success and enable ease of design with this new device technology. Published state-of-the-art circuits performance using this process technology clearly demonstrate its viability for mainstream applications.
Keywords :
III-V semiconductors; heterojunction bipolar transistors; indium compounds; integrated circuit design; integrated circuit manufacture; semiconductor device reliability; semiconductor device testing; 125 degC; HBT IC manufacturing; HBT IC process technology; InP; VBIC device models; design layout rules; mean-time-to-failure; process failure mode effects; process reliability qualification; standard library cells; statistical process control; Application specific integrated circuits; Failure analysis; Heterojunction bipolar transistors; Indium phosphide; Libraries; Manufacturing processes; Process control; Production; Qualifications; Semiconductor device manufacture;
Conference_Titel :
Indium Phosphide and Related Materials, 2004. 16th IPRM. 2004 International Conference on
Print_ISBN :
0-7803-8595-0
DOI :
10.1109/ICIPRM.2004.1442825
