Title :
Scalable pipeline architecture of MMSE MIMO detector for 4×4 MIMO-OFDM receiver
Author :
Yoshizawa, Shingo ; Ikeuchi, Hirokazu ; Miyanaga, Yoshikazu
Author_Institution :
Grad. Sch. of Inf. Sci. & Technol., Hokkaido Univ., Sapporo, Japan
fDate :
May 30 2010-June 2 2010
Abstract :
MIMO-OFDM performs signal detection on subcarrier-by-subcarrier basis and increases its computational complexity. A complete pipeline MMSE detector meeting requirements for a high throughput has been presented in our previous work, which provides real-time processing even for large numbers of subcarriers. However, it requires large circuit scale and tends to be excessive for small numbers of subcarriers. We propose a new scalable architecture to reduce circuit scale by adjusting the number of iterative operations related to OFDM parameters. The designed detector reduces to about 1/2 to 1/7 in circuit area and is superior to the conventional detectors in computation time.
Keywords :
MIMO communication; OFDM modulation; least mean squares methods; receivers; signal detection; MIMO OFDM Receiver; MMSE MIMO detector; computational complexity; real time processing; scalable pipeline architecture; signal detection; Circuits; Computational complexity; Computer architecture; Detectors; MIMO; OFDM; Pipeline processing; Signal detection; Throughput; Vectors;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537108