DocumentCode
3374138
Title
Multi-kernel simulation description within VHDL
Author
Oczko, Christel ; Nitsche, Michael W.
Author_Institution
Cadlab, Paderborn, Germany
fYear
1992
fDate
7-10 Sep 1992
Firstpage
686
Abstract
Summary form only given. The authors describe ongoing work on multikernel description facilities within VHSIC hardware description language (VHDL) which is performed in the scope of ECIP (European CAD Integration Project). The motivation, aims, and scope of the work are outlined
Keywords
circuit CAD; circuit analysis computing; specification languages; ECIP; VHDL; VHSIC hardware description language; multikernel description facilities; Availability; Backplanes; Circuit simulation; Concrete; Coupling circuits; Kernel; Predictive models; Standardization; Standards development; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
Conference_Location
Hamburg
Print_ISBN
0-8186-2780-8
Type
conf
DOI
10.1109/EURDAC.1992.246190
Filename
246190
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