Useful numerical techniques for compact modeling

This paper presents three useful numerical techniques for compact modeling. First, a new approach to modeling non-uniform vertical doping profiles in MOSFETs is presented, based on non-linear mapping of the backgate bias. Second, a technique that guarantees that limiting of V_ds at saturation will not lead to glitches in output conductance is presented. Finally, requirements for limiting functions for V_ds that do not cause discontinuities in high order derivatives at V_ds = 0 are defined. Examples of limiting functions that maintain proper symmetry are given. The techniques to eliminate glitches in output conductance and maintain symmetry are applicable to MOSFET and resistor models.