DocumentCode
3374223
Title
Performance evaluation of error-correcting scheme without redundancy code for noncoherent chaos communications
Author
Arai, Shigehisa ; Nishio, Yoshifumi ; Yamazato, Takaya ; Ozawa, Shinji
Author_Institution
ITS Lab., Aichi Univ. of Technol., Gamagori, Japan
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
2458
Lastpage
2461
Abstract
This paper considers a novel error-correcting scheme exploiting chaotic dynamics for noncoherent chaos communication. In our proposed system, two successive chaotic sequences are generated from the same chaotic map; the second sequence is generated with an initial value which is the last value of the first sequence. In this case, successive chaotic sequences having the same chaotic dynamics are created. This feature gives the receiver additional information to correctly recover the information data and thus improves the bit error performance of the receiver. Further, enhanced efficiency also comes from operating on successively modulated data; by involving less redundancy in the error correction system, it can be designed with high coding rate. In this paper, we analyze the scheme´s capability, by examining computational times and accuracy rates of error correction, bounds on its capability.
Keywords
chaotic communication; error correction codes; error statistics; performance evaluation; radio receivers; bit error performance; chaotic dynamics; error-correcting code; error-correcting scheme; noncoherent chaos communications; performance evaluation; receiver; Chaotic communication; Communication standards; Computer errors; Demodulation; Error correction; Error correction codes; Laboratories; Modulation coding; Redundancy; Transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537140
Filename
5537140
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