• DocumentCode
    3374403
  • Title

    Double-sampling analog-look-ahead second order ΣΔ modulator with reduced dynamics

  • Author

    Pena-Perez, Aldo ; Gonzalez-Diaz, Victor R. ; Maloberti, Franco

  • Author_Institution
    Dept. of Electron., Univ. of Pavia, Pavia, Italy
  • fYear
    2010
  • fDate
    May 30 2010-June 2 2010
  • Firstpage
    2422
  • Lastpage
    2425
  • Abstract
    A double sampled second order ΣΔ modulator with an analog look ahead (ALA) approach is presented. The proposed architecture provides an extra clock period to be used for the quantization. The feedforward path in both integrators allows the further reduction of the output voltage swing, relaxing also the slew-rate requirements of the op-amps. Moreover, the modulator enables the reduction of the number of quantization levels in the quantizer, thus the overall power consumption of the modulator would be significantly reduced. The proposed solution has been simulated at behavioral level by considering an improved model which takes into account the slew-rate and bandwidth limits.
  • Keywords
    delta-sigma modulation; analog-look-ahead delta-sigma modulator; double sampled second order delta-sigma modulator; double-sampling second order delta-sigma modulator; feedforward path; integrator; output voltage swing; power consumption; quantization level; reduced dynamics; Bandwidth; Clocks; Costs; Energy consumption; Frequency; Operational amplifiers; Quantization; Sampling methods; Voltage; Wideband;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
  • Conference_Location
    Paris
  • Print_ISBN
    978-1-4244-5308-5
  • Electronic_ISBN
    978-1-4244-5309-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.2010.5537148
  • Filename
    5537148