DocumentCode
3374529
Title
A fast and accurate characterization method for full-CMOS circuits
Author
LLopis, R. Peset ; Kerkhoff, H.G.
Author_Institution
MESA Res. Inst., Twente Univ., Enschede, Netherlands
fYear
1992
fDate
7-10 Sep 1992
Firstpage
410
Lastpage
415
Abstract
A fast and accurate method to determine delay, ramp (output rise/fall-time), power dissipation, and upper and lower noise margin values of full-CMOS circuits is presented. It is more than two orders of magnitude faster in comparison to conventional circuit simulations with an average error of 10% per logic cell. It can also deal with multiple time-overlapping inputs, a shortcoming of many current methods
Keywords
CMOS integrated circuits; circuit analysis computing; average error; characterization method; circuit simulations; delay; full-CMOS circuits; multiple time-overlapping inputs; power dissipation; ramp; Capacitance; Circuit noise; Circuit simulation; Libraries; Logic; Performance analysis; Power dissipation; Propagation delay; Pulse inverters; Shape;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
Conference_Location
Hamburg
Print_ISBN
0-8186-2780-8
Type
conf
DOI
10.1109/EURDAC.1992.246211
Filename
246211
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