DocumentCode :
3374772
Title :
Symmetry-aware analog layout placement design handling substrate-sharing constraints
Author :
He, Rui ; Zhang, Lihong
Author_Institution :
Memorial Univ. of Newfoundland, St. John´´s, NL, Canada
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
2398
Lastpage :
2401
Abstract :
This paper presents a solution to handling the symmetry and substrate-sharing constraints in the placement design using transitive closure graph (TCG) representation for analog layouts. We propose a new contour-based packing scheme to implement substrate-sharing constraints with the time complexity of O(p· n·lgn), where p is the number of symmetry groups and n is the number of the placed cells. Furthermore, a set of perturbation operations are devised with the time complexity of O(n) in order to generate a new random symmetric-feasible TCG state. Our experimental results show the effectiveness of this approach compared to other competitive placement algorithms.
Keywords :
analogue integrated circuits; circuit complexity; graph theory; integrated circuit layout; TCG representation; analog layouts; competitive placement algorithms; contour-based packing scheme; perturbation operations; random symmetric-feasible TCG state; substrate-sharing constraints; symmetry-aware analog layout placement design; time complexity; transitive closure graph representation; Geometry; Helium; MOS devices; Merging; Mirrors; Parasitic capacitance; Time factors; Voltage; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5537167
Filename :
5537167
Link To Document :
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