Built-in-self-test for the Tandem NonStop CLX processor

Author

Garcia, David J.

Author_Institution

Tandem Comput. Inc., Cupertino, CA, USA

fYear

1988

fDate

Feb. 29 1988-March 3 1988

Firstpage

520

Lastpage

524

Abstract

A built-in-self-test (BIST) method is presented that uses pseudorandom test vectors and scan path design. The BIST method used on the NonStop CLX processor is shown as an example. The pseudorandom test covers several custom CMOS ICs, commercial MSI logic, a static RAM array, and their interconnects. The BIST also does a functional test of the dynamic RAM main memory and its control logic. The BIST is low-cost and requires minimal overhead to support the test function. Control of the test is handled by maintenance processor software, simplifying the hardware dedicated to BIST.<>

Keywords

automatic testing; computer testing; fault tolerant computing; integrated circuit testing; logic testing; minicomputers; BIST method; Tandem NonStop CLX processor; built-in-self-test; commercial MSI logic; control logic; custom CMOS ICs; dynamic RAM main memory; functional test; maintenance processor software; minimal overhead; pseudorandom test vectors; scan path design; static RAM array; Built-in self-test; CMOS logic circuits; DRAM chips; Hardware; Logic arrays; Logic testing; Random access memory; Read-write memory; Software maintenance; Software testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Compcon Spring '88. Thirty-Third IEEE Computer Society International Conference, Digest of Papers

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-8186-0828-5

Type

conf

DOI

10.1109/CMPCON.1988.4922

Filename

4922