• DocumentCode
    3374865
  • Title

    A fast multilayer general area router for MCM designs

  • Author

    Khoo, Kei-Yong ; Cong, Jason

  • Author_Institution
    Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
  • fYear
    1992
  • fDate
    7-10 Sep 1992
  • Firstpage
    292
  • Lastpage
    297
  • Abstract
    The authors report on the development of an efficient multilayer general area router as an alternative to the three-dimensional (3-D) maze router for solving the multilayer multichip module (MCM) routing problem. The router, named SLICE, is independent of net ordering, requires much shorter computation time, and uses fewer vias. A key step in the router is to compute a maximum non-crossing bipartite matching, which is solved optimally in O(n log n) time where n is the number of possible connections. The router was tested on a number of examples, including two MCM designs. Compared to a 3-D maze router, SLICE is four times faster and uses 28% fewer vias. SLICE can successfully produce solutions for large MCM routing examples where 3-D maze routers fail due to insufficient memory
  • Keywords
    circuit layout CAD; multichip modules; 3-D maze router; MCM designs; SLICE; bipartite matching; fast multilayer general area router; multilayer multichip module; Computer science; Conductors; Delay; Multichip modules; Nonhomogeneous media; Packaging; Routing; Testing; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
  • Conference_Location
    Hamburg
  • Print_ISBN
    0-8186-2780-8
  • Type

    conf

  • DOI
    10.1109/EURDAC.1992.246229
  • Filename
    246229