DocumentCode :
3374890
Title :
Routing algorithms for multi-chip modules
Author :
Lienig, Jens ; Thulasiraman, K. ; Swamy, M.N.S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
fYear :
1992
fDate :
7-10 Sep 1992
Firstpage :
286
Lastpage :
291
Abstract :
Routing algorithms for multi-chip modules are presented. Two routing strategies, a channel routing and a grid-based routing, are discussed. The channel routing enables the designer to examine an effective routing during the placement phase. The grid-based routing calculates the net ordering with a new cost function and includes an effective rip-up and reroute procedure. The routing results of three different multichip modules are presented. Experimental results show that there is no direct correlation between the routing results of the channel algorithm and the grid-based one. It is concluded that channel routing is preferable only if the placement structure enables the generation of regular channels. In all other cases the grid-based algorithm is more effective using the channel routing just as a fast placement estimation
Keywords :
circuit layout CAD; multichip modules; channel routing; cost function; fast placement estimation; grid-based algorithm; grid-based routing; multichip modules; net ordering; routing algorithms; Algorithm design and analysis; Ceramics; Costs; Design automation; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Phase estimation; Routing; Surface-mount technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
Conference_Location :
Hamburg
Print_ISBN :
0-8186-2780-8
Type :
conf
DOI :
10.1109/EURDAC.1992.246230
Filename :
246230
Link To Document :
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