DocumentCode
3375072
Title
Branch classification: a new mechanism for improving branch predictor performance
Author
Chang, Po-Yung ; Hao, Eric ; Yeh, Tse-Yu ; Patt, Yale
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear
1994
fDate
30 Nov.-2 Dec. 1994
Firstpage
22
Lastpage
31
Abstract
There is wide agreement that one of the most important impediments to the performance of current and future pipelined superscalar processors is the presence of conditional branches in the instruction stream. Speculative execution seems to be one solution of choice to the branch problem, but speculative work is discarded if a branch is mispredicted. Therefore, we need a very accurate branch predictor; 95% accuracy is not good enough. This paper proposes branch classification to help improve the accuracy of branch predictors. Branch classification allows an individual branch instruction to be associated with the branch predictor best suited to predict its direction. Using this approach, a hybrid branch predictor can be constructed such that each component branch predictor predicts those branches for which it is best suited. This paper suggests one classification scheme, analyzes several branch predictors, and proposes a hybrid branch predictor that achieves higher prediction accuracy than any branch predictor previously reported in the literature.
Keywords
performance evaluation; pipeline processing; branch classification; branch predictor; branch predictor performance; conditional branches; hybrid branch predictor; instruction stream; pipelined superscalar processors; prediction accuracy; Accuracy; Analytical models; Hardware; Impedance; Machinery; Optimizing compilers; Permission; Pipelines; Predictive models;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture, 1994. MICRO-27. Proceedings of the 27th Annual International Symposium on
ISSN
1072-4451
Print_ISBN
0-89791-707-3
Type
conf
DOI
10.1109/MICRO.1994.717404
Filename
717404
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