DocumentCode :
3375116
Title :
A novel p-channel SOI LDMOS transistor with tapered field oxides
Author :
Kim, Jongdae ; Kim, Sang-Gi ; Roh, Tae Moon ; Koo, Jin Gun ; Nam, Kee-Soo
Author_Institution :
Electron. & Telecommun. Res. Inst., Daejeon, South Korea
fYear :
1998
fDate :
3-6 Jun 1998
Firstpage :
375
Lastpage :
378
Abstract :
The on-resistance of p-channel RESURF (reduced surface field) LDMOS (lateral double-diffused MOS) transistors has been improved by using a new tapered TEOS field oxide on the drift region of the devices. With a similar breakdown voltage, at Vgs=-5.0 V, the specific on-resistance of the LDMOS with the tapered field oxide is about 31.5 mΩ·cm2, while that of the LDMOS with the conventional field oxide is about Rsp=55.3 mΩ·cm 2
Keywords :
dielectric thin films; electric breakdown; electric fields; electric resistance; power MOSFET; semiconductor device testing; silicon-on-insulator; surface potential; -5 V; Si; SiO2-Si; breakdown voltage; device drift region; on-resistance; p-channel RESURF LDMOS transistors; p-channel SOI LDMOS transistor; p-channel reduced surface field lateral double-diffused MOS transistors; specific on-resistance; tapered TEOS field oxide; tapered field oxides; Annealing; Boron; CMOS process; Etching; Implants; Impurities; MOSFET circuits; Moon; Power MOSFET; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 1998. ISPSD 98. Proceedings of the 10th International Symposium on
Conference_Location :
Kyoto
ISSN :
1063-6854
Print_ISBN :
0-7803-4752-8
Type :
conf
DOI :
10.1109/ISPSD.1998.702721
Filename :
702721
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3375116
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