DocumentCode
3375352
Title
The interplay of run-time estimation and granularity in HW/SW partitioning
Author
Henkel, Jörg ; Ernst, Rolf
Author_Institution
Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany
fYear
1996
fDate
18-20 Mar 1996
Firstpage
52
Lastpage
58
Abstract
An important presupposition for HW/SW partitioning are sophisticated estimation algorithms at a high level of abstraction that obtain high quality results. Therefore the granularities of estimation and partitioning have to be adapted adequately. In this paper we discuss the effects that arise when the granularities of partitioning and estimation are not adapted in a necessary way. Furthermore we present our solution that allows to choose different levels of granularities adapted to the estimation and partitioning phase. The experiments show that this refinement in estimation at a high level of abstraction leads to an improvement (in terms of run-time and chip area) of the whole mixed HW/SW system
Keywords
CAD; logic design; logic partitioning; HW/SW partitioning; chip area; granularity; run-time estimation; Algorithm design and analysis; Consumer electronics; Costs; Design methodology; Hardware; Office automation; Partitioning algorithms; Phase estimation; Real time systems; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Co-Design, 1996. (Codes/CASHE '96), Proceedings., Fourth International Workshop on
Conference_Location
Pittsburgh, PA
Print_ISBN
0-8186-7243-9
Type
conf
DOI
10.1109/HCS.1996.492226
Filename
492226
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