The bang for the buck with resiliency: Yield or field?

Today´s electronic systems and those envisioned for the near future exploit significant integration of devices on a chip with incredibly shrinking device/interconnect geometries. Such systems operate very close to their power/performance margins to achieve maximum profitability. The increase in the design complexity of such systems that now include digital and analog components, coupled with the race to reach the market faster severely constrains the resources and time to validate and test them. Furthermore, products can also fail to operate correctly in the field prior to their expected end-of-life due to transient errors or aging.