• DocumentCode
    3375763
  • Title

    An approach to multi-paradigm controller synthesis from timing diagram specifications

  • Author

    Tiedemann, Wolf-Dieter

  • Author_Institution
    Passau Univ., Germany
  • fYear
    1992
  • fDate
    7-10 Sep 1992
  • Firstpage
    522
  • Lastpage
    527
  • Abstract
    The author reports on two high-level synthesis methods to derive controller implementations following different design paradigms from a common natural specification by timing diagrams. The first method automatically generates a Mealy automaton to be an input for a variety of excellent finite state machine (FSM) design algorithms. The second method supports an interactive bottom-up synthesis of asynchronous designs. Both methods are founded on the same mathematical basis, notably a process calculus. Due to their formal manifestation, every transformation (synthesis step) is verifiable. This leads to guaranteed correct implementations
  • Keywords
    control system CAD; finite state machines; formal verification; Mealy automaton; asynchronous designs; design paradigms; finite state machine; formal verification; high-level synthesis methods; interactive bottom-up synthesis; multi-paradigm controller synthesis; natural specification; process calculus; timing diagram specifications; timing diagrams; Circuit synthesis; Communication system control; Control system synthesis; Control systems; Design automation; Logic; Process control; Protocols; Signal synthesis; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European
  • Conference_Location
    Hamburg
  • Print_ISBN
    0-8186-2780-8
  • Type

    conf

  • DOI
    10.1109/EURDAC.1992.246314
  • Filename
    246314