• DocumentCode
    33758
  • Title

    Selectively Sampled Subharmonic-Free Digital Current Mode Control Using Direct Duty Control

  • Author

    Kapat, Santanu

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol. (IIT) Kharagpur, Kharagpur, India
  • Volume
    62
  • Issue
    3
  • fYear
    2015
  • fDate
    Mar-15
  • Firstpage
    311
  • Lastpage
    315
  • Abstract
    Benefits of digital current mode control are often limited by the choice of a current-loop sampling rate. A higher rate requires a fast analog-to-digital converter that consumes substantial power and increases cost. A lower rate often results in subharmonic oscillations, even using a programmable ramp compensation. This brief proposes a simple technique to compute the steady-state duty ratio in real time, when the closed-loop controller is in action. A time-to-digital converter translates cycle-by-cycle duty ratio information into digital code, and a “duty ratio computation” block generates the computed duty ratio using a moving average filter. At steady state, this enforces a virtual open-loop configuration and completely disables current-loop sampling and controller computation, thereby saving substantial power and eliminating subharmonic oscillations. Considering a dc-dc buck converter as the test case, it is found that even in the presence of high periodic behavior under the closed-loop control, a near-ideal steady-state duty ratio can be reconstructed. Design-related issues along with duty ratio saturation are discussed with test cases.
  • Keywords
    DC-DC power convertors; closed loop systems; compensation; digital control; digital-analogue conversion; electric current control; DC-DC buck converter; closed-loop controller; completely disables current-loop sampling; current-loop sampling rate; cycle-by-cycle duty ratio information; digital code; direct duty control; duty ratio computation block; duty ratio saturation; fast analog-to-digital converter; moving average filter; near-ideal steady-state duty ratio; programmable ramp compensation; selectively sampled subharmonic-free digital current mode control; subharmonic oscillations; time-to-digital converter; virtual open-loop configuration; Clocks; DC-DC power converters; Inductors; Oscillators; Steady-state; Switches; Voltage control; Digital current mode control (DCMC); Duty ratio computation; digital current mode control; duty ratio computation; limit cycle; selective sampling; sub-harmonic oscillations; subharmonic oscillations;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2014.2369091
  • Filename
    6951346