DocumentCode
3375965
Title
Table of contents
fYear
2011
fDate
1-5 May 2011
Abstract
The following topics are dealt with: post-silicon debug and customer returns; 3D integrated circuit; power issues in test; analog, mixed-signal and RF test/diagnosis; on-chip parametric sensor; delay and performance test; multifaceted approaches for field reliability; advanced methods for leveraging new test standards; memory test and repair; low power integrated circuit test; on-line and system testing; aging, transients and soft errors; solar cells; design for testability; error and fault tolerance; ATPG compression; and reducing test and diagnosis costs.
Keywords
ageing; analogue integrated circuits; automatic test pattern generation; delays; design for testability; integrated circuit reliability; integrated circuit testing; low-power electronics; mixed analogue-digital integrated circuits; radiation hardening (electronics); radiofrequency integrated circuits; semiconductor storage; solar cells; three-dimensional integrated circuits; transients; 3D integrated circuit; ATPG; RF circuit testing; analog circuit testing; customer returns; delay test; design for testability; fault tolerance; field reliability; integrated circuit aging; integrated circuit soft errors; integrated circuit transients; low power integrated circuit test; memory repair; memory test; mixed signal circuit testing; on-chip parametric sensor; on-line testing; performance test; post silicon debug; power issues; solar cells; system testing; test standards;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2011 IEEE 29th
Conference_Location
Dana Point, CA
ISSN
1093-0167
Print_ISBN
978-1-61284-657-6
Type
conf
DOI
10.1109/VTS.2011.5783790
Filename
5783790
Link To Document