DocumentCode :
3376291
Title :
Measurement study on simultaneous switching noise
Author :
Chen, Liren ; Sen, Bidyut
Author_Institution :
LSI Logic Corp., Milpitas, CA, USA
fYear :
1995
fDate :
2-4 Oct 1995
Firstpage :
40
Lastpage :
42
Abstract :
High-performance chip designs with large numbers of output drivers can be crippled by the simultaneous switching noise. A high-frequency test system for measuring ground bounce is described, along with measurements that were taken on test chips with different packaging design options such as multiple layers and chip capacitors. This paper discusses chip and package design guidelines for noise reduction
Keywords :
electric noise measurement; integrated circuit design; integrated circuit measurement; integrated circuit noise; integrated circuit packaging; chip capacitors; chip design; ground bounce; high-frequency test; multiple layers; output drivers; package design; simultaneous switching noise; Capacitors; Guidelines; Noise measurement; Noise reduction; Oscilloscopes; Packaging; Power generation; Semiconductor device measurement; Switches; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1995
Conference_Location :
Portland, OR
Print_ISBN :
0-7803-3034-X
Type :
conf
DOI :
10.1109/EPEP.1995.524689
Filename :
524689
Link To Document :
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