A Simple and Time-effective Procedure for ADC INL Estimation

This paper deals with a novel testing technique aimed at estimating the accuracy of analog-to-digital converters (ADC´s). Compared with other valuable research results, the main advantage of the proposed approach is the higher testing speed, i.e. the ability of achieving an accurate estimate of the low frequency component of an INL pattern in a shorter time than other standard techniques such as the sinewave histogram test (SHT). The performance of the whole procedure in terms of estimation accuracy has been determined theoretically and validated by means of both simulation and experimental results