Battery-powered digital CMOS design

Author

Pedram, Massoud ; Wu, Qing

Author_Institution

Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA

fYear

1999

fDate

1999

Firstpage

72

Lastpage

76

Abstract

In this paper we study tradeoffs between energy dissipation and delay in battery-powered digital CMOS designs. In contrast to previous work, we adopt an integrated model of the VLSI circuit and the battery sub-system that powers it. We show that accounting for the dependence of battery capacity on the average discharge current changes shape of the energy-delay trade-off curve and hence the value of the operating voltage that results in the optimum energy-delay product for the target circuit. Analytical derivations as well as experimental results demonstrate the importance of correct modeling of the battery-hardware system as a whole and provide a more accurate basis for comparing various low power optimization methodologies and techniques targeted toward battery-powered electronics

Keywords

CMOS digital integrated circuits; VLSI; cells (electric); convertors; delay estimation; integrated circuit design; integrated circuit modelling; low-power electronics; DC-DC convertor; VLSI circuit; average discharge current; battery sub-system; battery-hardware system model; battery-powered digital CMOS design; battery-powered electronics; delay; energy dissipation; energy-delay tradeoff curve; integrated model; low power optimization methodologies; operating voltage; optimum energy-delay product; Batteries; Circuit analysis; Delay; Energy dissipation; Optimization methods; Power system modeling; Semiconductor device modeling; Shape; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings

Conference_Location

Munich

Print_ISBN

0-7695-0078-1

Type

conf

DOI

10.1109/DATE.1999.761099

Filename

761099