DocumentCode
3378091
Title
System-level fault modeling and test pattern generation with process algebras
Author
Camurati, P. ; Corno, F. ; Prinetto, P.
Author_Institution
Dipartimento di Autom. e Inf., Politicnico di Torino, Turin, Italy
fYear
1993
fDate
19-22 Apr 1993
Firstpage
47
Lastpage
56
Abstract
The increasing complexity of systems is challenging designers with new issues, such as description, validation, verification, and testing at system level. This paper advocates the use of process algebras as a mathematically sound formalism to describe, validate, verify, and generate test patterns at system level. Its main contribution is twofold: the definition of a general-purpose fault model of faulty communications between fault-free, concurrently evolving processes; and the implementation of an automatic test pattern generation procedure, as a variant of the weak bisimulation algorithm, normally used to prove the observational equivalence of processes. Two examples are provided to support the claim for validity
Keywords
automatic testing; computer testing; fault location; formal logic; logic testing; ATPG; VLSI; automatic test pattern generation; faulty communications; general-purpose fault model; microprocessors; process algebras; system level fault modelling; weak bisimulation algorithm; Acoustic testing; Algebra; Automatic test pattern generation; Circuit faults; Electronic switching systems; Hardware; Petroleum; Power system modeling; System testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246534
Filename
246534
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