DocumentCode
3378118
Title
Testability and test protocol expansion in hierarchical macro testing
Author
Marinissen, Erik Jan ; Kuiper, Krijn ; Wouters, Clemens
Author_Institution
Philips Res. Labs., Eindhoven, Netherlands
fYear
1993
fDate
19-22 Apr 1993
Firstpage
28
Lastpage
36
Abstract
Test protocols play an important role within the macro tests strategy. They describe, independently of the actual test pattern values and in detail how, at which terminals, and at which moments tests stimuli should be applied and responses should be observed. Initially, test protocols are described at the terminals of the macro they test. Final execution should take place at the chip pins. Transforming a test protocol defined at the (local) macro terminals into a test protocol defined at the (global) chip pins is called test protocol expansion. Failing test protocol expansion indicates testability problems of the circuit under consideration
Keywords
automatic testing; design for testability; fault location; integrated circuit testing; ASIC; TDA1307; Video Datapath Chip; chip pins; hierarchical macro testing; macro terminals; test protocol expansion; testability; Access protocols; Circuit testing; Electronic equipment testing; Electronic mail; Hardware; Integrated circuit testing; Laboratories; Lakes; Pins; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246536
Filename
246536
Link To Document