Title :
Effect of noise on timing or data-pattern dependent delay variation when transmission-line effects are taken into account for on-chip wiring
Author :
Deutsch, A. ; Smith, H.H. ; Vakirtzis, C. ; Kozhaya, J. ; Greenberg, L.M.
Author_Institution :
T. J. Watson Res. Center, IBM, Yorktown Heights, NY
Abstract :
The impact of data-pattern variation on timing for on-chip interconnect timing is investigated for typical local, global, and clock wiring. The validity of the methodology to combine noise and timing engines is benchmarked against accurate non-linear simulations with R(f)L(f)C circuit representation and recommendations for CAD tool development are given.
Keywords :
CAD; delay circuits; integrated circuit interconnections; timing circuits; transmission lines; wires (electric); CAD; circuit representation; data pattern variation; delay variation; noise; on-chip interconnect timing; on-chip wiring; transmission-line effects; Clocks; Crosstalk; Delay effects; Frequency; Integrated circuit interconnections; Propagation delay; Timing; Transmission lines; Wires; Wiring;
Conference_Titel :
Signal Propagation on Interconnects, 2007. SPI 2007. IEEE Workshop on
Conference_Location :
Genova
Print_ISBN :
978-1-4244-1223-5
Electronic_ISBN :
978-1-4244-1224-2
DOI :
10.1109/SPI.2007.4512194
