DocumentCode
3378370
Title
Fault simulation for synchronous sequential circuits under the multiple observation time testing approach
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear
1993
fDate
19-22 Apr 1993
Firstpage
292
Lastpage
300
Abstract
The authors describe a fault simulator for synchronous sequential circuits given in gate-level. The simulator uses the multiple observation time testing approach to identify faults detected by a given test sequence, that cannot be identified as detected using a conventional fault simulator. It is shown that a test sequence that does not detect a given fault may still be effective in identifying that the circuit is faulty. This situation can only be identified by the multiple observation time approach. Based on this observation, one can propose a new definition of fault coverage, that is more effective than the conventional definition in retaining test sequences (or test vectors) that are effective in identifying faulty circuits. Experimental results are presented to support the effectiveness of multiple observation time fault simulation and of the new fault coverage definition
Keywords
digital simulation; electronic engineering computing; fault location; logic testing; sequential circuits; fault simulator; gate-level; multiple observation time testing; synchronous sequential circuits; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Electrical fault detection; Fault detection; Fault diagnosis; Performance evaluation; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246566
Filename
246566
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