Hardware implementations of algorithms on networks of FPGA processors

The reduction in size of features of integrated circuits means that a massive number of gates can be accommodated on a single device. In specific applications significant processing capacity can be incorporated into individual application specific integrated circuits. However, there will be many instances when such devices are not suitable, either due to performance considerations or flexibility requirements. A part of the resources of an application specific integrated circuit will not be used in processing but in offering user programmability. Clearly it would be possible to realise more substantial processing structures within a device if they were implemented within more flexible building blocks. This paper describes the work that is underway at the University of Kent to develop a flexible system based on FPGA devices for implementing algorithms described using VHDL