Digital quadrature demodulate design for electrical impedance tomography

A quadrature demodulation design method for EIT is proposed in this paper. Firstly, a quadrature demodulation circuit model is set up. Model simulation is done to test the correctness of the demodulation circuit model. The next step is to transform the circuit model to HDL files with signal compile. And then ModelSim is used to make functional simulation for the HDL files. Then synthesis, FPGA configurations and hardware implementation are done to finish the demodulation design. The results show that the quadrature demodulation can effectively detect the real and imaginary part of the measured complex impedance. With measurement errors into consideration, it meets measurement requirement in EIT and can provide necessary technical support for full information complex impedance measurement.