• DocumentCode
    3378865
  • Title

    Analysis of precision for scaling the intermediate variables in fixed-point arithmetic circuits

  • Author

    Sarbishei, Omid ; Radecka, Katarzyna

  • Author_Institution
    Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
  • fYear
    2010
  • fDate
    7-11 Nov. 2010
  • Firstpage
    739
  • Lastpage
    745
  • Abstract
    This paper presents a new technique for scaling the intermediate variables in implementing fixed-point polynomial-based arithmetic circuits. Analysis of precision has been used first to set the input and coefficient bit-widths of the polynomial so that a given error bound is satisfied. Then, we present an efficient approach to scale and truncate different intermediate variables with no need of re-computing precision at each stage. After applying it to all the intermediate variables, a final precision computation and sensitivity analysis is performed to set the final values of truncation bits so that the given error bound remains satisfied. Experimental results on a set of polynomial benchmarks show the robustness and efficiency of the proposed technique.
  • Keywords
    digital integrated circuits; fixed point arithmetic; polynomials; scaling circuits; sensitivity analysis; bit-width; error bound; fixed-point arithmetic circuit; fixed-point polynomial; intermediate variable scaling; sensitivity analysis; truncation bit; Adders; Algorithm design and analysis; Finite wordlength effects; Input variables; Polynomials; Quantization; Sensitivity analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    978-1-4244-8193-4
  • Type

    conf

  • DOI
    10.1109/ICCAD.2010.5654270
  • Filename
    5654270