DocumentCode
3379163
Title
Functional level testability analysis for digital circuits
Author
Ubar, Raimund ; Kuchcinski, Krzysztof
Author_Institution
Tallinn Tech. Univ., Estonia
fYear
1993
fDate
19-22 Apr 1993
Firstpage
545
Lastpage
546
Abstract
A general approach is proposed for calculating controllabilities and observabilities of signals in sequential and combinational circuits at the functional level. The methods and algorithms are based on alternative graphs which are an extension of binary decision diagrams. The algorithms are general and can be easily adjusted for calculation of different testability measures. A structured expression of the combinational controllability is presented, which allows to regard initiability and different heuristic controllability measures as components of the probabilistic controllability
Keywords
combinatorial circuits; controllability; design for testability; logic testing; observability; probability; sequential circuits; binary decision diagrams; combinational circuits; functional level; heuristic controllability; logic testing; observabilities; probabilistic controllability; sequential circuits; Boolean functions; Circuit analysis; Circuit testing; Combinational circuits; Data structures; Digital circuits; Observability; Sequential analysis; Sequential circuits; Signal analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246623
Filename
246623
Link To Document