Scheduling to timing optimization for a novel high-level synthesis approach

Traditional IC design methodology based on standard cells shows its limitation on design efficiency, which can not satisfy the needs for shorter time-to-market and more advanced functionality of IC products. To solve this problem, a novel high level synthesis method named operator design method is proposed. In this paper, a scheduling scheme to timing optimization for operator design method is proposed, which is carried out based on the attributes of the operand in the operation and dependence of the operations. The experiment results proves the feasibility and the efficiency of the operator design method, and obtains a 65% faster data-processing capacity and 30% reduction in hardware cost than that of SPARK tool of University California at San Diego.