DocumentCode
3379442
Title
Behavioural modelling of analogue faults in VHDL-AMS - a case study
Author
Zwolinski, Mark ; Brown, Andrew D.
Author_Institution
Sch. of Electron. & Comput. Sci., Southampton Univ., UK
Volume
5
fYear
2004
fDate
23-26 May 2004
Abstract
Analogue fault simulation is needed to evaluate the quality of tests, but is very computationally intensive. Behavioural simulation is more abstract and thus faster than fault simulation. Using a phase-locked loop as a case study, we show how behavioural fault models can be derived from transistor-level fault simulations and that faulty behaviour can be accurately modeled.
Keywords
fault simulation; hardware description languages; integrated circuit modelling; mixed analogue-digital integrated circuits; phase locked loops; VHDL-AMS; analogue fault simulation; behavioural analogue fault modelling; behavioural fault models; behavioural simulation; faulty behaviour modelling; intensive computation; phase-locked loop; transistor-level fault simulation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer aided software engineering; Computer science; Computer simulation; Electronic equipment testing; Phase locked loops; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329887
Filename
1329887
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