DocumentCode
3379487
Title
Voltage-mode quaternary FPGAs: An evaluation of interconnections
Author
Lazzari, Cristiano ; Flores, Paulo ; Monteiro, José ; Carro, Luigi
Author_Institution
ALGOS Group, INESC-ID, Lisbon, Portugal
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
869
Lastpage
872
Abstract
This work presents a study about FPGA interconnections and evaluates their effects on voltage-mode binary and quaternary FPGA structures. FPGAs are widely used due to the fast time-to-market and reduced non-recurring engineering costs in comparison to ASIC designs. Interconnections play a crucial role in modern FPGAs, because they dominate delay, power and area. The use of multiple-valued logic allows the reduction of the number of signals in the circuit, hence providing a mean to effectively curtail the impact of interconnections. The most important characteristic of the results are the reduced fanout, fewer number of wires and the smaller wire length presented by the quaternary devices. We use a set of arithmetic circuits to compare binary and quaternary implementations. This work presents the first step on developing quaternary circuits by mapping any binary random logic onto quaternary devices.
Keywords
field programmable gate arrays; interconnections; multivalued logic circuits; ASIC designs; arithmetic circuits; binary random logic mapping; multiple-valued logic; nonrecurring engineering costs; quaternary FPGA structures; voltage-mode binary structure; voltage-mode quaternary FPGA interconnection; Application specific integrated circuits; Costs; Design engineering; Field programmable gate arrays; Integrated circuit interconnections; Logic circuits; Logic devices; Power engineering and energy; Time to market; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537423
Filename
5537423
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