Title :
Stacked capacitor cells for 64 MDRAM
Author :
Matsukawa, Takayuki ; Nakano, Takao
Author_Institution :
LSI Res. & Dev. Lab., Mitsubishi Electr. Corp., Hyogo, Japan
Abstract :
Technological solutions to cope with the problem of how to adopt the stacked capacitor cell to 64 Mb DRAM and beyond are discussed. The stacked capacitor cell is the only candidate to realize beyond 64 Mb DRAM with economically reasonable cost
Keywords :
DRAM chips; VLSI; cellular arrays; 64 Mbit; DRAM; cost; stacked capacitor cell; Capacitance; Capacitors; Cities and towns; Costs; Dielectric films; Etching; Large scale integration; Lithography; Random access memory; Research and development;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1991. Proceedings of Technical Papers, 1991 International Symposium on
Conference_Location :
Taipei
Print_ISBN :
0-7803-0036-X
DOI :
10.1109/VTSA.1991.246668
