DocumentCode :
3379570
Title :
A transceiver for 800 kb/s full-duplex transmission over digital subscriber loops using a custom VLSI adaptive filter processor
Author :
Itri, Benedict A. ; Brackert, Ralph H., Jr. ; Nicholas, Henry T., III ; Samueli, Henry
Author_Institution :
PairGain Technol. Inc., Torrance, CA, USA
fYear :
1991
fDate :
22-24 May 1991
Firstpage :
252
Lastpage :
256
Abstract :
Presents the design of a bidirectional 800 kb/s transceiver the enables data transmission for T1 services over unconditioned telephone wire facilities. The transceiver transmits a 4-level PAM line code (2B1Q) and uses a baud-spaced sampled receiver. The DSP-based transceiver utilizes a custom CMOS VLSI 64-tap LMS adaptive filter chip to provide echo cancellation and decision-feedback equalization. Error-free full-duplex transmission is achieved over 16 kft. of 24 AWG cable or 12 kft. of 26 AWG cable
Keywords :
CMOS integrated circuits; VLSI; adaptive filters; echo suppression; equalisers; subscriber loops; transceivers; 800 kbit/s; AWG cable; CMOS; LMS adaptive filter chip; T1 services; baud-spaced sampled receiver; custom VLSI adaptive filter processor; data transmission; decision-feedback equalization; digital subscriber loops; echo cancellation; four-level PAM line code; full-duplex transmission; transceiver; unconditioned telephone wire facilities; Adaptive filters; CMOS technology; Clocks; Computer architecture; DSL; Decision feedback equalizers; Echo cancellers; Finite impulse response filter; Intersymbol interference; Transceivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1991. Proceedings of Technical Papers, 1991 International Symposium on
Conference_Location :
Taipei
ISSN :
1524-766X
Print_ISBN :
0-7803-0036-X
Type :
conf
DOI :
10.1109/VTSA.1991.246671
Filename :
246671
Link To Document :
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