DocumentCode
3379578
Title
FPGA implementation of floatingpoint rotation mode CORDIC algorithm
Author
Gopikiran, G. ; Thilagavathy, R.
Author_Institution
ECE Dept., Nat. Inst. of Technol., Tiruchirappalli, India
fYear
2011
fDate
21-22 July 2011
Firstpage
506
Lastpage
508
Abstract
In this paper we implemented a single-precision floating-point CORDIC algorithm in rotation mode. The architecture of floating point CORDIC algorithm is in a floating-point representation for the angle. The angle is represented as a combination of exponent, microrotation bits and two bits to indicates rotation over 0 to π radians. Representing floating-point angle in this form maintains the accuracy that is presented in the input data which makes it to suitable for implementing a floating-point given operations.
Keywords
field programmable gate arrays; floating point arithmetic; FPGA implementation; floating-point representation; single-precision floating-point CORDIC algorithm; Clocks; Digital signal processing; Equations; Field programmable gate arrays; Hardware; Signal processing algorithms; Transmission line matrix methods; CORDIC; FPGA; Floatingpoint;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing, Communication, Computing and Networking Technologies (ICSCCN), 2011 International Conference on
Conference_Location
Thuckafay
Print_ISBN
978-1-61284-654-5
Type
conf
DOI
10.1109/ICSCCN.2011.6024604
Filename
6024604
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