DocumentCode :
3379714
Title :
Analysis of PCFICH channel architecture for LTE using unfolding technique
Author :
Abbas, S. Syed Ameer ; Praba, R. Lakshumi ; Thiruvengadam, S.J.
Author_Institution :
Dept. of ECE, Mepco Schlenk Eng. Coll., Sivakasi, India
fYear :
2011
fDate :
21-22 July 2011
Firstpage :
537
Lastpage :
542
Abstract :
Realization of transmitter and Receiver architecture for LTE is the major research work being carried out by implementation experts. There are four Control channels available in LTE for both uplink and downlink. The uplink control channel is PUCCH. The downlink control channels are PDCCH, PCFICH and PHICH. The Physical Control Format Indicator Channel(PCFICH) is one among the downlink physical control channel and it carries the number of OFDM symbols used by the PDCCH channel, denoted as Control Format Indicator(CFI). These control channels play a key role in the correct decoding of the payload information. The CFI is the first information received by the User and so is important for the system performance. In this paper, the realization of architecture for the PCFICH are done using FPGA, and the VLSI DSP technique called unfolding is applied for optimization. The simulations are done using Modelsim and are implemented in Xilinx Spartan 3E kit.
Keywords :
Long Term Evolution; OFDM modulation; VLSI; field programmable gate arrays; FPGA; LTE; Modelsim; OFDM; PCFICH channel architecture; PDCCH; PHICH; PUCCH; VLSI DSP; Xilinx Spartan 3E kit; downlink control channels; optimization; physical control format indicator channel; unfolding technique; uplink control channel; Computer architecture; Delay; Downlink; Gold; OFDM; Receivers; Transmitters; CFI; FPGA; LTE; Unfolding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing, Communication, Computing and Networking Technologies (ICSCCN), 2011 International Conference on
Conference_Location :
Thuckafay
Print_ISBN :
978-1-61284-654-5
Type :
conf
DOI :
10.1109/ICSCCN.2011.6024610
Filename :
6024610
Link To Document :
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