DocumentCode
3380084
Title
Can spike timing dependent plasticity compensate for process mismatch in neuromorphic analogue VLSI?
Author
Cameron, Katherine ; Murray, Alan
Author_Institution
Sch. of Eng. & Electron., Edinburgh Univ., UK
Volume
5
fYear
2004
fDate
23-26 May 2004
Abstract
Analogue VLSI can be used to implement spike timing dependent neuromorphic training algorithms. This work presents a circuitry that uses spike timing to "adapt out" the effects of device mismatch in such circuits. Simulation results for the circuit implemented in 0.35 μm CMOS process are reported.
Keywords
Monte Carlo methods; VLSI; analogue integrated circuits; neural chips; neurophysiology; plasticity; timing circuits; 0.35 micron; CMOS process; device mismatch; neuromorphic analogue VLSI; process mismatch; spike timing dependent neuromorphic training; spike timing dependent plasticity; CMOS process; Circuit simulation; Delay; Fabrication; Fires; Geometry; Neuromorphics; Neurons; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329916
Filename
1329916
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