DocumentCode :
3380221
Title :
An EOS-Free PNP-enhanced cascoded NMOSFET structure for high voltage application
Author :
Wang, Shih-Yu ; Chang, Yao-Wen ; Yan-Yu Chen ; He, Chieh-Wei ; Wu, Guan-Wei ; Tao-Cheng Lu ; Chen, Yan-Yu ; Lu, Tao-Cheng
Author_Institution :
Macronix Int. Co., Ltd., Hsinchu, Taiwan
fYear :
2011
fDate :
10-14 April 2011
Abstract :
An EOS-free PNP-enhanced cascoded NMOSFET structure for high voltage application is proposed. By controlling the bias of the first gate of cascoded NMOSFET, the EOS-free control circuit can not only raise the holding voltage in normal high voltage (HV) operation to prevent from the threats of EOS damages, but also retain the strong ESD robustness during ESD stress. The improved EOS immunity is successfully verified by a simple EOS-emulating test in this paper.
Keywords :
MOSFET; electrostatic discharge; EOS damages; EOS immunity; EOS-emulating test; EOS-free control circuit; ESD robustness; ESD stress; PNP-enhanced cascoded NMOSFET structure; bias control; high voltage application; Earth Observing System; Electrostatic discharge; Logic gates; MOS devices; MOSFET circuits; Robustness; Video recording; Cascoded; EOS-Free; High Voltage Application; PNP-Enhanced;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium (IRPS), 2011 IEEE International
Conference_Location :
Monterey, CA
ISSN :
1541-7026
Print_ISBN :
978-1-4244-9113-1
Electronic_ISBN :
1541-7026
Type :
conf
DOI :
10.1109/IRPS.2011.5784506
Filename :
5784506
Link To Document :
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