Latch-up free ESD protection design with SCR structure in advanced CMOS technology

Author

Wang, Chang-Tzu ; Tang, Tien-Hao ; Su, Kuan-Cheng

Author_Institution

ESD Eng. Dept., United Microelectron. Corp., Hsinchu, Taiwan

fYear

2011

fDate

10-14 April 2011

Abstract

An electrostatic discharge (ESD) protection circuit with silicon-controlled-rectifier (SCR) device has been designed without latch-up risk. After fabrication in a 0.13-μm CMOS process, the ESD protection circuit with SCR width of 60μm can sustain 6.2kV human-body-model (HBM) and 475V machine model (MM) ESD tests. The latch-up test shows the immunity against 500-mA triggering current under 3.3V supply voltage.

Keywords

CMOS integrated circuits; electrostatic discharge; protection; thyristors; CMOS technology; HBM; MM ESD test; SCR device; SCR structure; current 500 mA; electrostatic discharge protection circuit; human-body-model; latch-up free ESD protection design; machine model ESD tests; silicon-controlled-rectifler device; size 0.13 mum; size 60 mum; voltage 3.3 V; voltage 475 V; voltage 6.2 kV; Anodes; CMOS integrated circuits; CMOS process; Electrostatic discharge; Logic gates; Thyristors; Voltage measurement; electrostatic discharge (ESD); latch-up; silicon-controlrectifier (SCR);

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2011 IEEE International

Conference_Location

Monterey, CA

ISSN

1541-7026

Print_ISBN

978-1-4244-9113-1

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2011.5784507

Filename

5784507