A high quality stacked thermal/LPCVD gate oxide for ULSI

A high quality LPCVD SiO₂ film with interface quality, trapping behavior, and intrinsic dielectric integrity comparable to dry thermal oxide is demonstrated. By stacking thermal and high quality LPCVD SiO₂ films, gate oxides with very different defect densities are demonstrated. The tradeoffs between quality of each SiO ₂ layer and the ability of one layer to compensate for defects in the other layer are presented. The lowest defect density (much lower than a conventional dry thermal oxide film) is observed in a stacked gate oxide consisting of a 95 Å thermal oxide followed by a 25 Å LPCVD oxide deposition and a short reoxidation. Thicker LPCVD oxide layers increase the defect density of the stacked dielectric compared to this optimal case. These results demonstrate that an optimized thermal/LPCVD oxide stacked dielectric is a promising candidate as the gate oxide of ULSI MOS devices