LOCOS-based isolation for 0.5 μm device with PLD (polysilicon-spacered lateral diffusion) technology

Polysilicon spacer was formed at nitride sidewalls of conventional LOCOS-based isolation. Poly spacer not only suppressed the physical bird´s beak encroachment but also reduced the chemical field ion encroachment into the channel region. For 0.5 μm isolation, high field ion dose of at least 8E13 cm-2 is required to increase the threshold voltage of parasitic transistor. The problems due to high field implantation dose-poor junction characteristics, and high narrow channel effect and substrate bias effect of small transistors-were overcome by using PLD technology. It is also confirmed that sub-half micron isolation can also be achieved with lightly doped S/D structure combined with PLD isolation