DocumentCode
3380497
Title
Soft error testing at advanced technology nodes
Author
Bhuva, B. ; Narasimham, B. ; Oates, A. ; Patterson, K. ; Tam, N. ; Vilchis, M. ; Wen, S.-J. ; Wong, R. ; Xu, Y.
Author_Institution
Vanderbilt Univ., Nashville, TN, USA
fYear
2011
fDate
10-14 April 2011
Abstract
A test vehicle concept for soft error testing of flip-flop designs has been developed and verified at 40 nm technology node. Key contribution of this test vehicle has been identification of any new unpredictable failure mechanisms, training of engineers for soft error testing and mitigation, establishment of knowledge database, and to build a start-to-finish (designers-foundry-system) link for a complete solution for soft error related issues. Major issues faced by the designers and test results are discussed for 40 nm technology node.
Keywords
flip-chip devices; integrated circuit reliability; monolithic integrated circuits; advanced technology nodes; flip-flop designs; knowledge database; soft error testing; test vehicle concept; unpredictable failure mechanisms; Fabrication; Failure analysis; Flip-flops; IP networks; Integrated circuits; Neutrons; IC design; Soft errors; alpha particles; neutrons; testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2011 IEEE International
Conference_Location
Monterey, CA
ISSN
1541-7026
Print_ISBN
978-1-4244-9113-1
Electronic_ISBN
1541-7026
Type
conf
DOI
10.1109/IRPS.2011.5784519
Filename
5784519
Link To Document