An 81Gb/s, 1.2V TIALA-Retimer in Standard 65nm CMOS

This paper describes the fastest full-rate retiming circuit reported to date in any semiconductor technology. By combining low- and high-V_T MOSFETs on the data and clock path, respectively, and CMOS-inverter based transimpedance amplifiers as low-noise, broadband preamplifiers, record speed is achieved with 1.2 V supply. The power consumption of the 81 GHz latch is only 9.6 mW. On-wafer measurements demonstrate correct full-rate retiming up to 81 Gb/s with jitter reduction and rise/fall time improvements.