• DocumentCode
    3380604
  • Title

    An 81Gb/s, 1.2V TIALA-Retimer in Standard 65nm CMOS

  • Author

    Shahramian, Shahriar ; Carusone, Anthony Chan ; Schvan, Peter ; Voinigescu, Sorin P.

  • Author_Institution
    Dept. of ECE, Univ. of Toronto, Toronto, ON
  • fYear
    2008
  • fDate
    12-15 Oct. 2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper describes the fastest full-rate retiming circuit reported to date in any semiconductor technology. By combining low- and high-VT MOSFETs on the data and clock path, respectively, and CMOS-inverter based transimpedance amplifiers as low-noise, broadband preamplifiers, record speed is achieved with 1.2 V supply. The power consumption of the 81 GHz latch is only 9.6 mW. On-wafer measurements demonstrate correct full-rate retiming up to 81 Gb/s with jitter reduction and rise/fall time improvements.
  • Keywords
    CMOS integrated circuits; MOSFET; low noise amplifiers; wideband amplifiers; CMOS-inverter based transimpedance amplifiers; MOSFET; broadband preamplifiers; frequency 81 GHz; full-rate retiming circuit; low-noise amplifier; power 9.6 mW; voltage 1.2 V; Broadband amplifiers; CMOS technology; Circuits; Clocks; Energy consumption; Latches; Low-noise amplifiers; MOSFETs; Preamplifiers; Time measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compound Semiconductor Integrated Circuits Symposium, 2008. CSIC '08. IEEE
  • Conference_Location
    Monterey, CA
  • ISSN
    1550-8781
  • Print_ISBN
    978-1-4244-1939-5
  • Electronic_ISBN
    1550-8781
  • Type

    conf

  • DOI
    10.1109/CSICS.2008.51
  • Filename
    4674506
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3380604