• DocumentCode
    3380845
  • Title

    Memristor models and circuits for controlling Process-VDD-Temperature variations

  • Author

    Jo, Kwan-Hee ; Jung, Chul-Moon ; Min, Kyeong-Sik

  • Author_Institution
    Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea
  • fYear
    2011
  • fDate
    25-28 Oct. 2011
  • Firstpage
    283
  • Lastpage
    286
  • Abstract
    In this paper, first, we discuss how to model and simulate the memristor circuits with Process-VDD-Temperature (PVT) variations using Verilog-A. Secondly, the SPICE macromodel and emulation circuit are introduced to help the memristor research without the memristor fabrication facilities. Thirdly, a concept of self-adjustment circuit is introduced to mitigate the problems in memristor reading and writing that are due to PVT variations.
  • Keywords
    SPICE; hardware description languages; memristors; SPICE macromodel; Verilog-A; emulation circuit; memristor circuits; memristor models; process-VDD-temperature variations; self-adjustment circuit; Anodes; Cathodes; Data models; Hardware design languages; IP networks; Memristors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2011 IEEE 9th International Conference on
  • Conference_Location
    Xiamen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-61284-192-2
  • Electronic_ISBN
    2162-7541
  • Type

    conf

  • DOI
    10.1109/ASICON.2011.6157177
  • Filename
    6157177
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3380845