Memristor models and circuits for controlling Process-VDD-Temperature variations

In this paper, first, we discuss how to model and simulate the memristor circuits with Process-V_DD-Temperature (PVT) variations using Verilog-A. Secondly, the SPICE macromodel and emulation circuit are introduced to help the memristor research without the memristor fabrication facilities. Thirdly, a concept of self-adjustment circuit is introduced to mitigate the problems in memristor reading and writing that are due to PVT variations.