DocumentCode :
3380923
Title :
A study of dual-Vt configurations of an 8T SRAM cell in 45nm
Author :
Liu, Wenbin ; Wang, Jinhui ; Wu, Wuchen ; Peng, Xiaohong ; Hou, Ligang
Author_Institution :
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
fYear :
2011
fDate :
25-28 Oct. 2011
Firstpage :
295
Lastpage :
298
Abstract :
Since the dual-threshold voltage assignment is an effective technique to reduce leakage power with negligible area overhead, we evaluate and compare the performance of an 8T SRAM cell in various dominant dual-Vt configurations in this paper, in order to provide the designer with a reasonable trade-off in SNM, leakage power, and delay for further different desired yields. According to simulation results, it is concluded that the configuration C8 has the highest SNM and high Vt Mnl can suppress the leakage current effectively. At last, the write and read delay time in different dual-Vt configurations are analyzed, and the reasons for delay variation are given.
Keywords :
SRAM chips; leakage currents; 8T SRAM cell; SNM; dual-Vt configuration; dual-threshold voltage assignment; leakage current; leakage power; size 45 nm; write-and-read delay time; Delay; Medical services; Tin; 8T; SNM; SRAM; delay; leakage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2011 IEEE 9th International Conference on
Conference_Location :
Xiamen
ISSN :
2162-7541
Print_ISBN :
978-1-61284-192-2
Electronic_ISBN :
2162-7541
Type :
conf
DOI :
10.1109/ASICON.2011.6157180
Filename :
6157180
Link To Document :
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