DocumentCode :
3381037
Title :
The design of two-dimensional FIR and IIR filter architectures for HDTV signal processing
Author :
Lee, Hwan-Rei ; Jen, Chein-Wei
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
1991
fDate :
22-24 May 1991
Firstpage :
307
Lastpage :
311
Abstract :
Multiplexers and carry-save-adders are used as the basic cells of designing two-dimensional FIR and IIR filter architectures for HDTV image processing. Compared with the existed design, this architecture can process each sample in eight gate delays without trading with extra hardware. Besides, it has the features of short latency, low cost and is systolic
Keywords :
adders; high definition television; multiplexing equipment; two-dimensional digital filters; 2D digital filters; FIR filters; HDTV signal processing; IIR filter architectures; carry-save-adders; cost; gate delays; latency; multiplexers; Costs; Delay; Finite impulse response filter; HDTV; IIR filters; Multiplexing; Process design; Signal design; Signal processing; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 1991. Proceedings of Technical Papers, 1991 International Symposium on
Conference_Location :
Taipei
ISSN :
1524-766X
Print_ISBN :
0-7803-0036-X
Type :
conf
DOI :
10.1109/VTSA.1991.246742
Filename :
246742
Link To Document :
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