Power grid sizing via convex programming

With the technology scaling and supply voltage reduction, designing a robust on-chip power network has become a challenging problem. In this paper, we devise a power grid sizing method to optimize the worst IR drop without explicitly deriving the current distribution. The method reduces the sizing problem into an effective resistance optimization problem which can be solved by convex programming efficiently. Experimental results show that our method can achieve up to 40% improvement for 2D grids and 7.32% improvement for a four-layer power grid.