DocumentCode
3381403
Title
Low cost 400 MHz source synchronous data links
Author
Nikel, Ronald E.
Author_Institution
Div. of Supercomput. Syst., Circuits & Interconnect Technol. Group, Mountain View, CA, USA
fYear
1995
fDate
2-4 Oct 1995
Firstpage
146
Lastpage
148
Abstract
Design of low cost high speed interconnect is a challenge that faces system designers. A method for designing and modeling a 400 MHz CMOS system interconnect is discussed. Detailed measurements of signal quality and interconnect are presented
Keywords
CMOS digital integrated circuits; application specific integrated circuits; data communication; digital communication; integrated circuit interconnections; packaging; transmission line theory; 400 MHz; high speed interconnect; low cost interconnect; modeling; signal quality; synchronous data links; Backplanes; Clocks; Connectors; Costs; Delay; Driver circuits; Integrated circuit interconnections; Latches; Vehicles; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 1995
Conference_Location
Portland, OR
Print_ISBN
0-7803-3034-X
Type
conf
DOI
10.1109/EPEP.1995.524878
Filename
524878
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